February_Heterogeneous Integration|Analysis of Important Process Technology Development Trend of Advanced Packaging(Up)

Published On: 2023/02/01|Categories: 科技(Technology)|

The evolution of semiconductor packaging technology is based on the year 2000 as the development node, before the traditional packaging technology can be subdivided into three stages of development, the 1970s for the Through Hole Packaging (Through Hole) era, the representative package type is a DIP with pin pins on both sides, which are soldered to the printed circuit board through the jack and wave soldering process; the 1980s for the Surface Mount Technology (SMT) era, the representative package type is a QFP, SOP, LCC with wing or ding shaped pins on two or four sides, which are soldered to the printed circuit board through the surface mounting process; the 1990s for the SMT era. In the 1980s, it was the SMT (Surface Mounting) era, and the representative package types were QFP, SOP, and LCC, which had wing or ding shaped pins coming out from two or four sides, and were soldered to PCBs through the SMT process; in the 1990s, it was the Array Packaging era, and the representative package types were PGA and BGA, which had solder balls at the bottom instead of pins/wires, and could increase the number of connections to PCBs dramatically.

After 2000 into the advanced packaging generation, the initial chip size package (Chip Size Package; CSP) is still a single chip package, but the size of the chip area does not exceed 120% to meet the trend of electronic products thin and lightweight. The subsequent development of system level packaging (System in a Package; SiP) began to integrate multiple functional chips in a single package components, at a lower cost to achieve the same as the system on a chip (System On a Chip; SoC) effect. The next step was the introduction of Package on Package (PoP), where two or more components are vertically stacked and then packaged into a larger component. Subsequent development of wafer level package (Wafer Level Package; WLP) dramatically change the process, it is first packaged on wafers, testing and then cut into components, the size of which is equivalent to the wafer. 2010 towards three-dimensional development, the successive development of 2.5D and 3D packaging technology. According to the report released by IEEE, the current leading vendors in each technology are listed in Table 2.

 

Table 1: Leading Manufacturers of Advanced Packaging Technologies

Source : IEEE

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